In our regular day-to-day life Electronics are part of life, be it a mobile phones, laptops, smart TVs, and so on. The heart of this electronic component is semi-conductor chips(computer chips). The semiconductor industry is a very big market with a lot of development and innovation that happens on daily basis. With the prominence of Artificial Intelligence and analyzing lots and lots of data that we are generating in day-to-day life, we need to have fast-functioning chips to serve our purpose.
To build complex chips, we need to incorporate lots of tiny components onoontongle platform which will do loa t of operations. With this introduction a, quethe stion may come. How are we doing this?.?
The answer is VLSI technology.
Very Large Scale Integration Technology is the process of integrating a very large number of transistors onto theangle silicon. The remarkable growth of electronics is mainly because of VLSI technology.
There are a lot of steps being executed for a chip to come out successfully. A few steps are described briefly below.
Design Specification: This is a highigh-levelterpretation of any chip design. Key parameters such as design techniques, fabrication methodologies, physical dimensions, functionality, and performance.
Design Architecture: An architect will decide the structure of the chip. Across all the possibilities, they decide the best configuration depending on the customer's requirement or based on the goal they want to achieve.
Functional Design: This recognizes the main functions of the design. A design engineer translates architecture into microarchitecture.
Logic Design: Involves converting the architecture specifications into high-level functional design using different computer languages such as Verilog, and VHDL.
Circuit Design: The basic component of circuits is a transistor. Basic arithmetic functions can be done using circuit design. Small circuit blocks are connected to large circuit blocks which are then connected to form a bigger integrated circuit.
Physical Design: Physical designer converts the logic design into gates, transistors level design, and eventually converts it to a layout. It will involve synthesis, custom circuit design, timing, reliability, floorplan, place, and route, and finally ge,t it ready for a tape out.
So what are the companies that manufacture semiconductor chips?
There is lara ge number of companies that design and manufacture chips. The big players include
Intel,
AMD,
NVIDIA,
SAMSUNG
and many more.
There are a lot of job opportunities and growth opportunities in the VLSI technology field.
Along with the above-described steps, several positions, but not limited to, are described below.
Formal verification: This is a comparison between Verilog RTL and netlist generated by the synth engineer. Before releasing netlist to PD teams we have to check whether both netlist and RTL or identical or not. Because at the time of synth the design will optimize a lot.
Synthesis/STA: In this stage, we will check the timing between RR(reg-reg), IR(input-reg), RO(reg-output), and IO. There is a chance signal might lose between these paths. so the synth engineer checks the timing with different clock frequencies and delivers the netlist with positive slack to the PD team.
DFT: Design for testing will run parallel to synth. This is used to find the faults within the chip after manufacture. There might be a chance that a signal might have the same value constantly which will lead to wrong functionality. DFT engineers create tests to find such kinds of issues.
FPGA/Emulation: This may come into the picture at the time of design verification or after the chip came back from foundries. Emulation engineers dump the design on an FPGA board or on an HW Emulator depending on the purpose of the chip and what they are targetting. They will do basic functionality checks and delivers the setup to the validation or software team.
FPGA Engineers should know synthesis, HW Emulator, and FPGA boards
DV ENGINEER: A design verification engineer verifies the functionality of the design. They will create checkers, and assertions and do coverage to find the functionality bugs.
Gate level verification: Once the netlist came out DV engineer tested the functionality before delivering it to the physical design team.
Power verification: This is done to check the power consumption of the design. This will give PD engineers an idea about the power consumption before they start working.
Floor planning: Floor planning is the art of physical design. A well and perfect floorplan leads to a design with higher performance and optimum area.
Placement and routing: Placement and routing are performed to lay out the nets.
Physical design verification: Before sending the final netlist to foundries, the DV team runs a few important tests to make sure functionality is still intact.
Perusing a minimum degree in electronics will open doors to entering into the VLSI industry. Having advanced degrees such as B.Tech, M.Tech and Ph.D. will provide more opportunities.
Pre/Post silicon validation: The validation team runs their test on the FPGA board to check the functionality of the design. (pre-silicon). Companies build customized PCB boards to place the final chip and to test its functionality(post-silicon validation).
Happy Learning
Dileep Gangavaram
Note: Opinions expressed by authors are their own.
Pic credits: pixabay
The Connection Between a Mother’s Kiss and a Newborn: Emotion, Science, and Sanatana DharmaDear Friends,Recently, a social media influencer shared a heartwarming video that captivated
Crafting Your Teacher Identity: Defining Your Educational Philosophy"Teaching is not a profession; it's a passion. Without passion for your subject and for your students, you will never be
The Cost of Wasted Time: A Reflection on Networking, Focus, and ProductivityDear Friends,Recently, I came across a post on X by Naval Ravikant that said, “Networking is overrated. Go do something
The Steam Engine: A Catalyst of Progress and TransformationThe steam engine is more than just a machine; it’s a symbol of human ingenuity and innovation that forever changed the course of history.
Top-20 EAPCET colleges for CIVIL ENGINEERING in KUPPAM basis EAPCET 2023 cut-off ranks. Cut-off ranks are for OC-Male category from 2022, and 2023 data. You can
Top-20 EAPCET colleges for ARTIFICIAL INTELLIGENCE AND MACHINE LEARNING in TIRUVURU basis EAPCET 2023 cut-off ranks. Cut-off ranks are for OC-Male category from 2022, and 2023
Top-20 EAPCET colleges for ELECTRONICS AND COMMUNICATION ENGINEERING (INDUSTRY INTEGRATED) in TEKKALI basis EAPCET 2023 cut-off ranks. Cut-off ranks are for OC-Male category
Top-20 EAPCET colleges for ARTIFICIAL INTELLIGENCE AND DATA SCIENCE in PARITALA basis EAPCET 2023 cut-off ranks. Cut-off ranks are for OC-Male category from 2022, and 2023 data.
How an Invisible Man is Killing Traditional Jobs and Creating Alternative Opportunities?Dear FriendsListen to my story! I am not threatening you but to create awareness! This is Ravi Saripalle.
Top-20 EAPCET colleges for DIGITAL TECHNIQUES FOR DESIGN AND PLANNING basis EAPCET 2023 cut-off ranks. Cut-off ranks are for OC-Male category from 2022, and 2023 data.
Top-20 EAPCET colleges for COMPUTER SCIENCE AND ENGINEERING in KURNOOL basis EAPCET 2023 cut-off ranks. Cut-off ranks are for OC-Male category from 2022, and 2023 data.
Top-20 EAPCET colleges for PHARM.D(MPC STREAM) in VISAKHAPATNAM basis EAPCET 2023 cut-off ranks. Cut-off ranks are for OC-Male category from 2022, and 2023 data.